- 封装:16-TSSOP(0.173",4.40mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:带卷 (TR)
- 参考价格:$1.343
更新日期:2024-04-01
产品简介:具有直通式引脚排列的四路 LVDS 接收器
查看详情- 封装:16-TSSOP(0.173",4.40mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:带卷 (TR)
- 参考价格:$1.343
SN65LVDS048APWR 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
-
TI
-
原厂原装
22+ -
3288
-
上海市
-
-
-
一级代理原装
-
TI
-
TSSOP-16
10+ -
3825
-
杭州
-
-
-
原装正品现货
-
TI/德州仪器
-
21+
TSSOP16 -
10000
-
杭州
-
-
-
只做原装现货,大量现货热卖
-
TI(德州仪器)
-
TSSOP-16
2022+ -
12000
-
上海市
-
-
-
原装可开发票
-
TI
-
SMD
23+ -
15000
-
上海市
-
-
-
中国区代理原装进口特价
-
TEXAS INSTRU
-
TSSOP-16
新批号 -
8887770
-
上海市
-
-
-
原厂发货进口原装微信同步QQ893727827
-
TI
-
-
2021+ -
28000
-
苏州
-
-
SN65LVDS048APWR 中文资料属性参数
- 标准包装:2,000
- 类别:集成电路 (IC)
- 家庭:接口 - 驱动器,接收器,收发器
- 系列:65LVDS
- 类型:接收器
- 驱动器/接收器数:0/4
- 规程:LVDS
- 电源电压:3 V ~ 3.6 V
- 安装类型:表面贴装
- 封装/外壳:16-TSSOP(0.173",4.40mm 宽)
- 供应商设备封装:16-TSSOP
- 包装:带卷 (TR)
产品特性
- >400 Mbps (200 MHz) Signaling Rates
- Flow-Through Pinout Simplifies PCB Layout
- 50 ps Channel-to-Channel Skew (Typ)
- 200 ps Differential Skew (Typ)
- Propagation Delay Times 2.7 ns (Typ)
- 3.3-V Power Supply Design
- High Impedance LVDS Inputs on Power Down
- Low-Power Dissipation (40 mW at 3.3 V Static)
- Accepts Small Swing (350 mV) Differential Signal Levels
- Supports Open, Short, and Terminated Input Fail-Safe
- Industrial Operating Temperature Range (40°C to 85°C)
- Conforms to TIA/EIA-644 LVDS Standard
- Available in SOIC and TSSOP Packages
- Pin-Compatible With DS90LV048A From National
产品概述
The SN65LVDS048A is a quad differential line receiver that implements the electrical characteristics of low-voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5-V differential standard levels (such as EIA/TIA-422B) to reduce the power, increase the switching speeds, and allow operation with a 3.3-V supply rail. Any of the quad differential receivers will provide a valid logical output state with a ±100-mV differential input voltage within the input common-mode voltage range. The input common-mode voltage range allows 1 V of ground potential difference between two LVDS nodes.The intended application of this device and signaling technique is for point-to-point baseband data transmission over controlled impedance media of approximately 100 . The transmission media may be printed-circuit board traces, backplanes, or cables. The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media, the noise coupling to the environment, and other system characteristics.The SN65LVDS048A is characterized for operation from 40°C to 85°C.
SN65LVDS048APWR 数据手册
数据手册 | 说明 | 数量 | 操作 |
---|---|---|---|
![]() |
LVDS QUAD DIFFERENTIAL LINE RECEIVER |
11 Pages页,283K | 查看 |
![]() |
Quad LVDS Receiver with Flow-Through Pinout 16-TSSOP -40 to 85 |
13页,324K | 查看 |
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