- 封装:64-TFSOP (0.240",6.10mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:管件
- 参考价格:$10.878-$9.996
更新日期:2024-04-01
产品简介:16 通道 LVDM 收发器
查看详情- 封装:64-TFSOP (0.240",6.10mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:管件
- 参考价格:$10.878-$9.996
SN65LVDM1677DGG 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
-
TI
-
原厂原装
22+ -
3288
-
上海市
-
-
-
一级代理原装
-
TI
-
-
8 -
838
-
杭州
-
-
-
原装正品现货
-
TI
-
-
2019+ -
5800
-
上海市
-
-
-
全新原装现货
-
TI/BB
-
模块
23+ -
15000
-
上海市
-
-
-
中国区代理原装进口特价
-
TI
-
-
21+ -
2000
-
上海市
-
-
-
原装现货,品质为先!请来电垂询!
-
TI(德州仪器)
-
TSSOP-64
2022+ -
12000
-
上海市
-
-
-
原装可开发票
SN65LVDM1677DGG 中文资料属性参数
- 标准包装:25
- 类别:集成电路 (IC)
- 家庭:接口 - 驱动器,接收器,收发器
- 系列:-
- 类型:线路收发器
- 驱动器/接收器数:16/16
- 规程:LVDS
- 电源电压:3 V ~ 3.6 V
- 安装类型:表面贴装
- 封装/外壳:64-TFSOP (0.240",6.10mm 宽)
- 供应商设备封装:64-TSSOP
- 包装:管件
- 其它名称:296-9735-5
产品特性
- Sixteen Low-Voltage Differential Transceivers. Designed for Signaling Rates up to 200 Mbps per Receiver or 650 Mbps per Transmitter.
- Simplex (Point-to-Point) or Half-Duplex (Multipoint) Interface
- Typical Differential Output Voltage of 340 mV Into a 50- Line Termination on 'LVDM1677 Product
- Propagation Delay Time: Driver: 2.5 ns TypReceiver: 3 ns Typ
- Driver: 2.5 ns Typ
- Receiver: 3 ns Typ
- Driver is High Impedance When Disabled or With VCC < 1.5 V for Power Up/Down Glitch-Free Performance and Hot-Plugging Events
- Bus-Terminal ESD Protection Exceeds 12 kV
- Low-Voltage TTL (LVTTL) Logic Input Levels Are 5-V Tolerant
- Packaged in Thin Shrink Small-Outline Package With 20 mil Terminal Pitch
产品概述
The SN65LVDM1676 and SN65LVDM1677 (integrated termination) are sixteen differential line transmitters or receivers (tranceivers) that use low-voltage differential signaling (LVDS) to achieve signaling rates up to 200 Mbps per transceiver configured as a receiver and up to 650 Mbps per transceiver configured as a transmitter. These products are similar to TIA/EIA-644 standard compliant devices (SN65LVDS) counterparts except that the output current of the drivers are doubled. This modification provides a minimum differential output voltage magnitude of 247 mV into a 50- load and allows double-terminated lines and half-duplex operation. The receivers detect a voltage difference of 100 mV with up to 1 V of ground potential difference between a transmitter and receiver.The intended application of this device and signaling technique is for point-to-point baseband data transmission over controlled impedance media of approximately 100 . The transmission media may be printed-circuit board traces, backplanes, or cables. The large number of transceivers integrated into the same substrate along with the low pulse skew of balanced signaling, allows extremely precise timing alignment of clock and data for synchronous parallel data transfers. (Note: The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media, the noise coupling to the environment, and other system characteristics.)The SN65LVDM1676 and SN65LVDM1677 are characterized for operation from -40°C to 85°C.
SN65LVDM1677DGG 数据手册
数据手册 | 说明 | 数量 | 操作 |
---|---|---|---|
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HIGH SPEED DIFFERENTIAL LINE TRANSCEIVERS |
20 Pages页,337K | 查看 |
![]() |
HIGH SPEED DIFFERENTIAL LINE TRANSCEIVERS |
20 Pages页,342K | 查看 |
![]() |
HIGH SPEED DIFFERENTIAL LINE TRANSCEIVERS |
20 Pages页,342K | 查看 |
![]() |
HIGH SPEED DIFFERENTIAL LINE TRANSCEIVERS |
20 Pages页,342K | 查看 |
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