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  • 封装:8-TSSOP,8-MSOP(0.118",3.00mm 宽)
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:带卷 (TR)
  • 参考价格:$1.343

更新日期:2024-04-01

产品简介:5.0V ECL 差动缓冲器

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  • 封装:8-TSSOP,8-MSOP(0.118",3.00mm 宽)
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:带卷 (TR)
  • 参考价格:$1.343

SN65EL16DGKR 供应商

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SN65EL16DGKR 中文资料属性参数

  • 标准包装:2,500
  • 类别:集成电路 (IC)
  • 家庭:接口 - 驱动器,接收器,收发器
  • 系列:-
  • 类型:接收器
  • 驱动器/接收器数:0/1
  • 规程:-
  • 电源电压:4.2 V ~ 5.7 V
  • 安装类型:表面贴装
  • 封装/外壳:8-TSSOP,8-MSOP(0.118",3.00mm 宽)
  • 供应商设备封装:8-MSOP
  • 包装:带卷 (TR)

产品特性

  • Differential PECL/NECL Receiver
  • Operating RangePECL: VCC = 4.2 V to 5.7 V With VEE = 0 VNECL: VCC = 0 V With VEE = -4.2 V to -5.7 V
  • PECL: VCC = 4.2 V to 5.7 V With VEE = 0 V
  • NECL: VCC = 0 V With VEE = -4.2 V to -5.7 V
  • 250-ps Propagation Delay
  • Support for Clock Frequencies >2 GHz
  • Deterministic Output Value for Open Input Conditions
  • Built-In Temperature Compensation
  • Drop-In Compatible With MC10EL16, MC100EL16
  • Built-In Input Pulldown Resistors
  • APPLICATIONSData and Clock Transmission Over Backplane
  • Data and Clock Transmission Over Backplane

产品概述

The SN65EL16 is a differential PECL/ECL receiver with PECL/ECL output. The device includes circuitry to hold Q to a low logic level when the inputs are in an open condition.The VBB pin is a reference voltage output for the device. When the device is used in the single-ended mode, the unused input should be tied to VBB. This reference voltage can also be used to bias the input when it is ac coupled. When the VBB pin is used, place a 0.01-µF decoupling capacitor between VCC and VBB. Also, limit the sink/source current to <0.5 mA to VBB. Leave VBB open when it is not used.The SN65EL11 is housed in an industry-standard SOIC-8 package and is also available in a TSSOP-8 package.

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