更新日期:2024-04-01
产品简介:具有预设和清零功能的双通道 J-K 下降沿触发器
查看详情SN54S112J 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
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Texas Instruments
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CDIP16
21+ -
9
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上海市
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一级代理原装
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TI
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8 -
5500
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杭州
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原装正品现货
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TI
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DIP
21+ -
2500
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上海市
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原装现货,品质为先!请来电垂询!
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TI
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DIP
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86
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台州
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SN54S112J 中文资料属性参数
- 现有数量:0现货1,649Factory
- 价格:在售
- 系列:*
- 包装:管件
- 产品状态:在售
- 功能:-
- 类型:-
- 输出类型:-
- 元件数:-
- 每个元件位数:-
- 时钟频率:-
- 不同 V、最大 CL 时最大传播延迟:-
- 触发器类型:-
- 电流 - 输出高、低:-
- 电压 - 供电:-
- 电流 - 静态 (Iq):-
- 输入电容:-
- 工作温度:-
- 安装类型:-
- 供应商器件封装:-
- 封装/外壳:-
产品特性
- Fully Buffered to Offer Maximum Isolation from External Disturbance
- Package Options Include Plastic “Small Outline" Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs
- Dependable Texas Instruments Quality and Reliability
产品概述
These devices contain two independent J-K negative-edge-triggered flip-flops.
A low level at the preset and clear inputs sets or resets the outputs regardless
of the levels of the other inputs. When preset and clear are inactive (high),
data at the J and K inputs meeting the setup time requirements are transferred
to the outputs on the negative-going edge of the clock pulse. Clock triggering
occurs at a voltage level and is not directly related to the rise time of
the clock pulse. Following the hold time interval, data at the J and K inputs
may be changed without affecting the levels at the outputs. These versatile
flip-flops can perform as toggle flip-flops by tying J and K high.
The SN54LS112A and SN54S112 are characterized for operation over the full
military temperature range of -55°C to 125°C. The SN74LS112A and SN74S112A
are characterized for operation from 0°C to 70°C.
SN54S112J 数据手册
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