- 参考价格:¥262.75-¥307.74
更新日期:2024-04-01
产品简介:具有 150MHz 频率、256KB 闪存、EMIF 的 C2000? 32 位 MCU(增强型产品)
查看详情- 参考价格:¥262.75-¥307.74
SM320F2812PGFMEPG4 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
-
TI
-
-
最新批号 -
6996
-
上海市
-
-
SM320F2812PGFMEPG4 中文资料属性参数
- 制造商:Texas Instruments
- 产品种类:数字信号处理器与控制器 (DSP, DSC)
- 封装:Tray
- 产品:DSPs
- 工厂包装数量:40
产品特性
- Controlled Baseline One Assembly/Test/Fabrication Site
- One Assembly/Test/Fabrication Site
- Extended Temperature Performance of 55°C to 125°C
- Enhanced Diminishing Manufacturing Sources (DMS) Support
- Enhanced Product-Change Notification
- Qualification Pedigree(1)
- High-Performance Static CMOS Technology 150 MHz (6.67-ns Cycle Time) Low-Power (1.8-V Core @135 MHz, 1.9-V Core @150 MHz, 3.3-V I/O) Design
- 150 MHz (6.67-ns Cycle Time)
- Low-Power (1.8-V Core @135 MHz, 1.9-V Core @150 MHz, 3.3-V I/O) Design
- JTAG Boundary Scan Support(2)
- High-Performance 32-Bit CPU (320C28x) 16 × 16 and 32 × 32 MAC Operations 16 × 16 Dual MAC Harvard Bus Architecture Atomic Operations Fast Interrupt Response and Processing Unified Memory Programming Model 4M Linear Program/Data Address Reach Code-Efficient (in C/C++ and Assembly) 320F24x/LF240x Processor Source Code Compatible
- 16 × 16 and 32 × 32 MAC Operations
- 16 × 16 Dual MAC
- Harvard Bus Architecture
- Atomic Operations
- Fast Interrupt Response and Processing
- Unified Memory Programming Model
- 4M Linear Program/Data Address Reach
- Code-Efficient (in C/C++ and Assembly)
- 320F24x/LF240x Processor Source Code Compatible
- On-Chip Memory Flash Devices: Up to 128K × 16 Flash (Four 8K × 16 and Six 16K × 16 Sectors) ROM Devices: Up to 128K × 16 ROM 1K × 16 OTP ROM L0 and L1: 2 Blocks of 4K × 16 Each Single-Access RAM (SARAM) H0: 1 Block of 8K × 16 SARAM M0 and M1: 2 Blocks of 1K × 16 Each SARAM
- Flash Devices: Up to 128K × 16 Flash (Four 8K × 16 and Six 16K × 16 Sectors)
- ROM Devices: Up to 128K × 16 ROM
- 1K × 16 OTP ROM
- L0 and L1: 2 Blocks of 4K × 16 Each Single-Access RAM (SARAM)
- H0: 1 Block of 8K × 16 SARAM
- M0 and M1: 2 Blocks of 1K × 16 Each SARAM
- Boot ROM (4K × 16) With Software Boot Modes Standard Math Tables
- With Software Boot Modes
- Standard Math Tables
- External Interface (2812) Over 1M × 16 Total Memory Programmable Wait States Programmable Read/Write Strobe Timing Three Individual Chip Selects
- Over 1M × 16 Total Memory
- Programmable Wait States
- Programmable Read/Write Strobe Timing
- Three Individual Chip Selects
- Clock and System Control Dynamic PLL Ratio Changes Supported On-Chip Oscillator Watchdog Timer Module
- Dynamic PLL Ratio Changes Supported
- On-Chip Oscillator
- Watchdog Timer Module
- Three External Interrupts
- Peripheral Interrupt Expansion (PIE) Block That Supports 45 Peripheral Interrupts
- Three 32-Bit CPU-Timers
- 128-Bit Security Key/Lock Protects Flash/ROM/OTP and L0/L1 SARAM Prevents Firmware Reverse Engineering
- Protects Flash/ROM/OTP and L0/L1 SARAM
- Prevents Firmware Reverse Engineering
- Motor Control Peripherals Two Event Managers (EVA, EVB) Compatible to 240xA Devices
- Two Event Managers (EVA, EVB)
- Compatible to 240xA Devices
- Serial Port Peripherals Serial Peripheral Interface (SPI) Two Serial Communications Interfaces (SCIs), Standard UART Enhanced Controller Area Network (eCAN) Multichannel Buffered Serial Port (McBSP)
- Serial Peripheral Interface (SPI)
- Two Serial Communications Interfaces (SCIs), Standard UART
- Enhanced Controller Area Network (eCAN)
- Multichannel Buffered Serial Port (McBSP)
- 12-Bit ADC, 16 Channels 2 × 8 Channel Input Multiplexer Two Sample-and-Hold Single/Simultaneous Conversions Fast Conversion Rate: 80 ns/12.5 MSPS
- 2 × 8 Channel Input Multiplexer
- Two Sample-and-Hold
- Single/Simultaneous Conversions
- Fast Conversion Rate: 80 ns/12.5 MSPS
- Up to 56 General Purpose I/O (GPIO) Pins
- Advanced Emulation Features Analysis and Breakpoint Functions Real-Time Debug via Hardware
- Analysis and Breakpoint Functions
- Real-Time Debug via Hardware
- Development Tools Include ANSI C/C++ Compiler/Assembler/Linker Code Composer Studio™ IDE DSP/BIOS™
- ANSI C/C++ Compiler/Assembler/Linker
- Code Composer Studio™ IDE
- DSP/BIOS™
- Low-Power Modes and Power Savings IDLE, STANDBY, HALT Modes Supported Disable Individual Peripheral Clocks
- IDLE, STANDBY, HALT Modes Supported
- Disable Individual Peripheral Clocks
- Package Options 179-Ball MicroStar BGA™ (GHH), (2812) 176-Pin Low-Profile Quad Flatpack (LQFP) (PGF) (2812)
- 179-Ball MicroStar BGA™ (GHH), (2812)
- 176-Pin Low-Profile Quad Flatpack (LQFP) (PGF) (2812)
产品概述
The SM320F2810-EP, SM320F2811-EP, SM320F2812-EP, SM320C2810-EP, SM320C2811-EP, and SM320C2812-EP devices, members of the TMS320C28x™ DSP generation, are highly integrated, high-performance solutions for demanding control applications. The functional blocks and the memory maps are described in Section 3, Functional Overview.Throughout this document, SM320F2810-EP, SM320F2811-EP, and SM320F2812-EP are abbreviated as F2810, F2811, and F2812, respectively. F281x denotes all three Flash devices. SM320C2810-EP, SM320C2811-EP, and SM320C2812-EP are abbreviated as C2810, C2811, and C2812, respectively. C281x denotes all three ROM devices. 2810 denotes both F2810 and C2810 devices; 2811 denotes both F2811 and C2811 devices; and 2812 denotes both F2812 and C2812 devices.
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