SI52147-A01AGM
时钟及计时器 IC(模拟)- 参考价格:¥20.15-¥25.05
更新日期:2024-04-01
SI52147-A01AGM 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
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SILICON
-
QFN48
24+ -
15000
-
深圳
-
11-13
-
SILICON原装现货可含税特价支持
-
TSSOP
23+ -
46000
-
合肥
-
-
-
科大讯飞战略投资企业,提供一站式配套服务
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SILICON
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48-QFN(6x6)
22+授权代理 -
15800
-
上海市
-
-
-
旋尔只做进口原装,假一赔十...
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SILICONLABS
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QFN48
20+ -
10000
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上海市
-
-
-
原装现货!品质为先!请来电垂询!
SI52147-A01AGM 中文资料属性参数
- 制造商:Silicon Laboratories
- 安装风格:SMD/SMT
- 封装 / 箱体:QFN-48
- 最大输入频率:200 MHz
- 最大输出频率:100 MHz
- 输出端数量:9
- 工作温度范围:- 40 C to + 85 C
- 类型:Clock Generator
SI52147-A01AGM 数据手册
数据手册 | 说明 | 数量 | 操作 |
---|---|---|---|
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IC CLK GENERATOR 100MHZ 48QFN |
25页,424K | 查看 |
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Preliminary Rev. 0.1 12/11 Copyright ? 2011 by Silicon Laboratories Si52147 This information applies to a product under development. Its characteristics and specifications are subject to change without notice. Si52147 PCI-EXPRESS GEN 1, GEN 2, & GEN 3 NINE OUTPUT CLOCK GENERATOR Features Applications Description The Si52147 is a spread-controlled PCIe clock generator that can source nine PCIe clocks simultaneously. The device has six hardware output enable control inputs for enabling the respective differential outputs on the fly while powered on along with the hardware spread control for EMI reduction. Functional Block Diagram ? PCI-Express Gen 1, Gen 2, & Gen 3 compliant ? Low power push-pull type differential output buffers ? Integrated resistors on differential clocks ? Output enable pin for all clocks ? Hardware selectable spread control ? Nine PCI-Express clocks ? 25 MHz crystal input or clock input ? I 2 C support with readback capabilities ? Triangular spread spectrum p |
22页,191K | 查看 |
![]() |
Preliminary Rev. 0.1 12/11 Copyright ? 2011 by Silicon Laboratories Si52147 This information applies to a product under development. Its characteristics and specifications are subject to change without notice. Si52147 PCI-EXPRESS GEN 1, GEN 2, & GEN 3 NINE OUTPUT CLOCK GENERATOR Features Applications Description The Si52147 is a spread-controlled PCIe clock generator that can source nine PCIe clocks simultaneously. The device has six hardware output enable control inputs for enabling the respective differential outputs on the fly while powered on along with the hardware spread control for EMI reduction. Functional Block Diagram ? PCI-Express Gen 1, Gen 2, & Gen 3 compliant ? Low power push-pull type differential output buffers ? Integrated resistors on differential clocks ? Output enable pin for all clocks ? Hardware selectable spread control ? Nine PCI-Express clocks ? 25 MHz crystal input or clock input ? I 2 C support with readback capabilities ? Triangular spread spectrum p |
22页,191K | 查看 |
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