- 参考价格:¥42.02-¥63.48
更新日期:2024-04-01

SCANSTA112VS 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
-
TI
-
原厂原装
22+ -
3288
-
上海市
-
-
-
一级代理原装
-
NS/ELNAF
-
TQFP100
1919+ -
111
-
上海市
-
-
-
原装现货,精专配套,正品BOM表报价
-
TI
-
原厂原封装
新批号 -
887000
-
上海市
-
-
-
原厂发货进口原装微信同步QQ893727827
-
TI(德州仪器)
-
TQFP-100
2022+ -
12000
-
上海市
-
-
-
原装可开发票
SCANSTA112VS 中文资料属性参数
- 制造商:National Semiconductor (TI)
- 最大工作温度:+ 85 C
- 封装:Tray
- 最小工作温度:- 40 C
- 工厂包装数量:90
产品特性
- True IEEE 1149.1 Hierarchical and Multidrop Addressable Capability
- The 8 Address Inputs Support up to 249 Unique Slot Addresses, an Interrogation Address, Broadcast Address, and 4 Multi-Cast Group Addresses (Address 000000 is Reserved)
- 7 IEEE 1149.1-Compatible Configurable Local Scan Ports
- Bi-directional Backplane and LSP0 Ports are Interchangeable Slave Ports
- Capable of Ignoring TRST of the Backplane Port when it Becomes the Slave.
- Stitcher Mode Bypasses Level 1 and 2 Protocols
- Mode Register0 Allows Local TAPs to be Bypassed, Selected for Insertion into the Scan Chain Individually, or Serially in Groups of Two or Three
- Transparent Mode can be Enabled with a Single Instruction to Conveniently Buffer the Backplane IEEE 1149.1 Pins to Those on a Single Local Scan Port
- General Purpose Local Port Pass Through Bits are Useful for Delivering Write Pulses for Flash Programming or Monitoring Device Status.
- Known Power-Up State
- TRST on all Local Scan Ports
- 32-bit TCK Counter
- 16-bit LFSR Signature Compactor
- Local TAPs can Become TRI-STATE via the OE Input to Allow an Alternate Test Master to Take Control of the Local TAPs (LSP0-3 have a TRI-STATE Notification Output)
- 3.0-3.6V VCC Supply Operation
- Supports Live Insertion/Withdrawal
产品概述
The SCANSTA112 extends the IEEE Std. 1149.1 test bus into a multidrop test bus
environment. The advantage of a multidrop approach over a single serial scan chain is improved test
throughput and the ability to remove a board from the system and retain test access to the
remaining modules. Each SCANSTA112 supports up to 7 local IEEE1149.1 scan chains which can be
accessed individually or combined serially. Addressing is accomplished by loading the instruction register with a value matching that
of the Slot inputs. Backplane and inter-board testing can easily be accomplished by parking the
local TAP Controllers in one of the stable TAP Controller states via a Park instruction. The 32-bit
TCK counter enables built in self test operations to be performed on one port while other scan
chains are simultaneously tested.The STA112 has a unique feature in that the backplane port and the LSP0 port are
bidirectional. They can be configured to alternatively act as the master or slave port so an
alternate test master can take control of the entire scan chain network from the LSP0 port while
the backplane port becomes a slave.
SCANSTA112VS 数据手册
数据手册 | 说明 | 数量 | 操作 |
---|---|---|---|
![]() |
7-port Multidrop IEEE 1149.1 (JTAG) Multiplexer |
15 Pages页,301K | 查看 |
![]() |
CONTROLLER; Voltage, Input Max:3.6V; Voltage, Output Max:2.4V; Max Output Current:24mA; Interface Type:Serial, Parallel; Voltage, Supply Min:3V; Voltage, Supply Max:3.6V; Termination Type:SMD; Case Style:TQFP; No. of Pins:100; Operating Temperature Range:-40°C to +85°C; Base Number:112 |
15页,693K | 查看 |
![]() |
Testing Equipment Interface 100-TQFP (14x14) |
22页,1.6M | 查看 |
![]() |
Testing Equipment Interface 100-TQFP (14x14) |
22页,1.6M | 查看 |
SCANSTA112VS 电路图

SCANSTA112VS 电路图
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