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更新日期:2024-04-01 00:04:00

产品简介:具有集成 PLL 和 3 个 LVDS/5 个 LVPECL 输出的 1 至 800MHz 精密时钟分配器

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LMK02000ISQ 供应商

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  • 型号
  • 品牌
  • 封装/批号
  • 数量
  • 地区
  • 日期
  • 说明
  • 询价

LMK02000ISQ 中文资料属性参数

  • 频率::800MHz
  • 输出通道数字::8
  • 封装形式::LLP
  • 针脚数::48
  • 工作温度范围::-40°C 到 +85°C
  • SVHC(高度关注物质)::No SVHC (19-Dec-2011)
  • 器件标号::2000
  • 封装类型::LLP
  • 工作温度敏::-40°C
  • 工作温度最高::85°C
  • 接口类型::PECL & LVDS
  • 时钟频率, 最高::800MHz
  • 最低时钟频率::1Hz
  • 电压 Vcc 最低::3.15V
  • 电压, Vcc::3.3V
  • 电压, Vcc 最大::3.45V
  • 电源电压 最大::3.45V
  • 电源电压 最小::3.15V
  • 类型::Clock Conditioner
  • 表面安装器件::表面安装
  • 输入电流::5μA
  • 输入类型::差分
  • 输出类型::LVDS, LVPECL
  • 逻辑功能号::2000

产品特性

  • 20 fs Additive Jitter
  • Integrated Integer-N PLL with Outstanding Normalized Phase Noise Contribution of -224 dBc/Hz
  • Clock Output Frequency Range of 1 to 800 MHz
  • 3 LVDS and 5 LVPECL Clock Outputs
  • Dedicated Divider and Delay Blocks on Each Clock Output
  • Pin Compatible Family of Clocking Devices
  • 3.15 to 3.45 V Operation
  • Package: 48 Pin WQFN (7.0 x 7.0 x 0.8 mm)

产品概述

The LMK02000 precision clock conditioner combines the functions of jitter cleaning/reconditioning, multiplication, and distribution of a reference clock. The device integrates a high performance Integer-N Phase Locked Loop (PLL), three LVDS, and five LVPECL clock output distribution blocks.Each clock distribution block includes a programmable divider, a phase synchronization circuit, a programmable delay, a clock output mux, and an LVDS or LVPECL output buffer. This allows multiple integer-related and phase-adjusted copies of the reference to be distributed to eight system components.The clock conditioner comes in a 48-pin WQFN package and is footprint compatible with other clocking devices in the same family.

LMK02000ISQ 电路图

LMK02000ISQ 电路图

LMK02000ISQ 电路图

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