DS92LV2411SQX/NOPB
接口 IC- 参考价格:¥42.16-¥43.75
更新日期:2024-04-01
DS92LV2411SQX/NOPB 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
-
TI
-
原厂原装
22+ -
3288
-
上海市
-
-
-
一级代理原装
-
TI(德州仪器)
-
WQFN-48(7x7)
2022+ -
12000
-
上海市
-
-
-
原装可开发票
DS92LV2411SQX/NOPB 中文资料属性参数
- 制造商:National Semiconductor (TI)
- 封装:Reel
- 工厂包装数量:2500
产品特性
- 24-Bit Data, 3–Bit Control, 5 to 50 MHz Clock
- Application Payloads up to 1.2 Gbps
- AC Coupled Interconnects: STP up to 10 m or Coax 20+m
- 1.8 V or 3.3 V Compatible LVCMOS I/O Interface
- Integrated Terminations on Ser and Des
- AT-SPEED BIST Mode and Reporting Pin
- Configurable by Pins or I2C Compatible Serial Control Bus
- Power Down Mode Minimizes Power Dissipation
- >8 kV HBM ESD Rating
- SERIALIZER — DS92LV2411 Supports Spread Spectrum Clocking (SSC) on Inputs Data Scrambler for Reduced EMI DC-Balance Encoder for AC Coupling Selectable Output VOD and Adjustable De-emphasis
- Supports Spread Spectrum Clocking (SSC) on Inputs
- Data Scrambler for Reduced EMI
- DC-Balance Encoder for AC Coupling
- Selectable Output VOD and Adjustable De-emphasis
- DESERIALIZER — DS92LV2412 Random Data Lock; no Reference Clock Required Adjustable Input Receiver Equalization LOCK (Real Time Link Status) Reporting Pin Selectable Spread Spectrum Clock Generation (SSCG) and Output Slew Rate Control (OS) to Reduce EMI
- Random Data Lock; no Reference Clock Required
- Adjustable Input Receiver Equalization
- LOCK (Real Time Link Status) Reporting Pin
- Selectable Spread Spectrum Clock Generation (SSCG) and Output Slew Rate Control (OS) to Reduce EMI
产品概述
The DS92LV2411 (Serializer) and DS92LV2412 (Deserializer) chipset translates a parallel
24–bit LVCMOS data interface into a single high-speed CML serial interface with embedded clock
information. This single serial stream eliminates skew issues between clock and data, reduces
connector size and interconnect cost for transferring a 24-bit, or less, bus over FR-4 printed
circuit board backplanes, differential or coax cables.In addition to the 24-bit data bus interface, the DS92LV2411/12 also features a 3-bit
control bus for slow speed signals. This allows implementing video and display applications with up
to 24–bits per pixel (RGB888).Programmable transmit de-emphasis, receive equalization, on-chip scrambling and DC
balancing enables long distance transmission over lossy cables and backplanes. The DS92LV2412
automatically locks to incoming data without an external reference clock or special sync patterns,
providing easy “plug-and-go” or “hot plug” operation. EMI is minimized by the use of low voltage
differential signaling, receiver drive strength control, and spread spectrum clocking
capability.The DS92LV2411/12 chipset is programmable though an I2C interface as well as through
Pins. A built-in AT-SPEED BIST feature validates link integrity and may be used for system
diagnostics.The DS92LV2411 is offered in a 48-Pin WQFN and the DS92LV2412 is offered in a 60-Pin WQFN
package. Both devices operate over the full industrial temperature range of 40°C to +85°C.
DS92LV2411SQX/NOPB 电路图

DS92LV2411SQX/NOPB 电路图
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