- 封装:64-TQFP
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:托盘
- 参考价格:$12.31875-$21.68
更新日期:2024-04-01
产品简介:八通道、低功耗、12 位、+/-16.5V 输出并行输入数模转换器
查看详情- 封装:64-TQFP
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:托盘
- 参考价格:$12.31875-$21.68
DAC7728SPAG 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
-
TI
-
原厂原装
22+ -
3288
-
上海市
-
-
-
一级代理原装
-
TI(德州仪器)
-
TQFP-64
2022+ -
12000
-
上海市
-
-
-
原装可开发票
-
TI
-
原厂原封装
新批号 -
887000
-
上海市
-
-
-
原厂发货进口原装微信同步QQ893727827
DAC7728SPAG 中文资料属性参数
- 标准包装:160
- 类别:集成电路 (IC)
- 家庭:数据采集 - 数模转换器
- 系列:-
- 设置时间:15µs
- 位数:12
- 数据接口:并联
- 转换器数目:1
- 电压电源:模拟和数字,双 ±
- 功率耗散(最大):224mW
- 工作温度:-40°C ~ 105°C
- 安装类型:表面贴装
- 封装/外壳:64-TQFP
- 供应商设备封装:64-TQFP(10x10)
- 包装:托盘
- 输出数目和类型:8 电压,单极;8 电压,双极
- 采样率(每秒):*
- 其它名称:296-25468
产品特性
- Bipolar Output: ±3V, up to ±16.5V
- Unipolar Output: 0V to +33V
- 12-Bit Resolution
- Low Power: 13.5mW/Ch
- Relative Accuracy: 1LSB Max
- Flexible User Calibration
- Low Zero/Gain Error: ±1 LSB Max
- Low Glitch: 4nV-s
- Settling Time: 15µs
- Channel Monitor Output
- Programmable Gain: x4, x6
- Programmable Offset
- 12-Bit Parallel Interface: 50MHz (Write Operation)
- Packages: QFN-56 (8mm x 8mm), TQFP-64 (10mm x 10mm)
- APPLICATIONS Automatic Test Equipment PLC and Industrial Process Control Communications
- Automatic Test Equipment
- PLC and Industrial Process Control
- Communications
产品概述
The DAC7728 is a low-power, octal, 12-bit digital-to-analog converter (DAC). With a 5V reference, the output can either be a bipolar ±15V voltage when operating from a dual ±15.5V (or higher) power supply, or a unipolar 0V to +30V voltage when operating from a +30.5V power supply. With a 5.5V reference, the output can either be ±16.5V for a dual ±17V (or higher) power supply, or a unipolar 0V to +33V voltage when operating from a +33.5V (or higher) power supply. This DAC provides low-power operation, good linearity, and low glitch over the specified temperature range of –40°C to +105°C. This device is trimmed in manufacturing and has very low zero and full-scale error. In addition, user calibration can be performed over the entire signal chain. The output range can be offset by using the DAC Offset Register. The DAC7728 features a standard, high-speed, 12-bit parallel interface that operates at up to 50MHz and is 1.8V, 3V, and 5V logic compatible, to communicate with a DSP or microprocessor. The eight DACs and the auxiliary registers are addressed with five address lines. The device features double-buffered interface logic. An asynchronous load input (LDAC) transfers data from the DAC data register to the DAC latch. The asynchronous CLR input sets the output of all eight DACs to AGND. The VMON pin is a monitor output that connects to the individual analog outputs, the offset DAC, and the reference buffer outputs through a multiplexer (mux). The DAC7728 is pin-to-pin compatible with the DAC8728 (16-bit) and the DAC8228 (14-bit).
DAC7728SPAG 数据手册
数据手册 | 说明 | 数量 | 操作 |
---|---|---|---|
![]() |
12 Bit Digital to Analog Converter 8 64-TQFP (10x10) |
55页,1.77M | 查看 |
DAC7728SPAG 电路图

DAC7728SPAG 电路图
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