更新日期:2024-04-01
产品简介:双通道、16 位、1.0GSPS、1x-4x 内插数模转换器 (DAC)
查看详情DAC5682ZIRGC 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
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TI
-
原厂原装
22+ -
3288
-
上海市
-
-
-
一级代理原装
-
TI(德州仪器)
-
VQFN-64(9x9)
2022+ -
12000
-
上海市
-
-
-
原装可开发票
-
TI
-
VQFN
23+ -
5800
-
上海市
-
-
-
进口原装现货,杜绝假货。
DAC5682ZIRGC 中文资料属性参数
- 现有数量:0现货10,000Factory查看交期
- 价格:250 : ¥565.69120卷带(TR)
- 系列:-
- 包装:卷带(TR)
- 产品状态:在售
- Digi-Key Programmable:Not Verified
- 位数:16
- 数模转换器数:2
- 建立时间:10.4ns(标准)
- 输出类型:Current - Unbuffered
- 差分输出:是
- 数据接口:LVDS - 并联
- 参考类型:外部,内部
- 电压 - 供电,模拟:3V ~ 3.6V
- 电压 - 供电,数字:1.7V ~ 1.9V
- INL/DNL (LSB):±4,±2
- 架构:电流阱
- 工作温度:-40°C ~ 85°C
- 封装/外壳:64-VFQFN 裸露焊盘
- 供应商器件封装:64-VQFN(9x9)
- 安装类型:表面贴装型
产品特性
- 16-Bit Digital-to-Analog Converter (DAC)
- 1.0 GSPS Update Rate
- 16-Bit Wideband Input LVDS Data Bus 8 Sample Input FIFO Interleaved I/Q Data for Dual-DAC Mode
- 8 Sample Input FIFO
- Interleaved I/Q Data for Dual-DAC Mode
- High Performance 73-dBc ACLR WCDMA TM1 at 180 MHz
- 73-dBc ACLR WCDMA TM1 at 180 MHz
- 2x-32x Clock Multiplying PLL/VCO
- 2x or 4x Interpolation Filters Stopband Transition 0.4 to 0.6 Fdata Filters Configurable in Either Low-Pass or High-Pass Mode Allows Selection of Higher Order Image
- Stopband Transition 0.4 to 0.6 Fdata
- Filters Configurable in Either Low-Pass or High-Pass Mode Allows Selection of Higher Order Image
- Fs/4 Coarse Mixer
- On-Chip 1.2-V Reference
- Differential Scalable Output: 2 to 20 mA
- Package: 64-Pin 9-mm × 9-mm QFN
- APPLICATIONS Cellular Base Stations Broadband Wireless Access (BWA) WiMAX 802.16 Fixed Wireless Backhaul Cable Modem Termination System (CMTS)
- Cellular Base Stations
- Broadband Wireless Access (BWA)
- WiMAX 802.16
- Fixed Wireless Backhaul
- Cable Modem Termination System (CMTS)
产品概述
The DAC5682Z is a dual-channel 16-bit 1.0 GSPS DAC with wideband LVDS data input,
integrated 2x/4x interpolation filters, onboard clock multiplier, and internal voltage reference.
The DAC5682Z offers superior linearity, noise, crosstalk, and PLL phase noise performance.The DAC5682Z integrates a wideband LVDS port with on-chip termination. Full-rate input
data can be transferred to a single DAC channel, or half-rate and 1/4-rate input data can be
interpolated by onboard 2x or 4x FIR filters. Each interpolation FIR is configurable in either
low-pass or high-pass mode, allowing selection of a higher order output spectral image. An on-chip
delay lock loop (DLL) simplifies LVDS interfacing by providing skew control for the LVDS input data
clock.The DAC5682Z allows both complex or real output. An optional Fs/4 coarse mixer in complex
mode provides coarse frequency upconversion and the dual DAC output produces a complex Hilbert
Transform pair. An external RF quadrature modulator then performs the final single sideband
up-conversion. The interpolation filters and complex coarse mixers efficiently provide frequency
plan flexibility while enabling higher output DAC rates to simplify image rejection
filtering.The DAC5682Z is characterized for operation over the industrial temperature range of
40°C to 85°C and is available in a 64-pin QFN package. Other single-channel members of the family
include the interpolating DAC5681Z and the noninterpolating DAC5681.
DAC5682ZIRGC 电路图

DAC5682ZIRGC 电路图
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