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  • 封装:16-TSSOP(0.173",4.40mm 宽)
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:带卷 (TR)
  • 参考价格:$4.264

更新日期:2024-04-01 00:04:00

产品简介:具有 8 路输出的 3.3V x4 时钟倍频器

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  • 封装:16-TSSOP(0.173",4.40mm 宽)
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:带卷 (TR)
  • 参考价格:$4.264

CDCVF25084PWR 供应商

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  • 型号
  • 品牌
  • 封装/批号
  • 数量
  • 地区
  • 日期
  • 说明
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CDCVF25084PWR 中文资料属性参数

  • 标准包装:2,000
  • 类别:集成电路 (IC)
  • 家庭:时钟/计时 - 时钟发生器,PLL,频率合成器
  • 系列:-
  • 类型:PLL 时钟乘法器
  • PLL:带旁路
  • 输入:LVTTL
  • 输出:LVTTL
  • 电路数:1
  • 比率 - 输入:输出:2:8
  • 差分 - 输入:输出:无/无
  • 频率 - 最大:180MHz
  • 除法器/乘法器:无/是
  • 电源电压:3 V ~ 3.6 V
  • 工作温度:-40°C ~ 85°C
  • 安装类型:表面贴装
  • 封装/外壳:16-TSSOP(0.173",4.40mm 宽)
  • 供应商设备封装:16-TSSOP
  • 包装:带卷 (TR)

产品特性

  • Phase-Locked Loop-Based Multiplier by Four
  • Input Frequency Range: 2.5 MHz to 45 MHz
  • Output Frequency Range: 10 MHz to 180 MHz
  • LVCMOS/LVTT I/O Compatible
  • Low Jitter (Cycle-Cycle): ±120 ps Over the Range 75 MHz to 180 MHz
  • Distributes One Clock Input to Two Banks of Four Outputs
  • Auto Frequency Detection to Disable Device (Power-Down Mode)
  • Operates From Single 3.3-V Supply
  • Industrial Temperature Range –40°C to 85°C
  • 25- On-Chip Series Damping Resistors
  • No External RC Network Required
  • Spread Spectrum Clock Compatible (SSC)
  • Available in 16-Pin TSSOP Package

产品概述

The CDCVF25084 is a high-performance, low-skew, low-jitter, phase-lock loop clock multiplier. It uses a PLL to precisely align, in both frequency and phase, the output clocks to the input clock signal including a multiplication factor of four. The CDCVF25084 operates from a nominal supply voltage of 3.3 V. The device also includes integrated series-damping resistors in the output drivers that make it ideal for driving point-to-point loads.Two banks of four outputs each provide low-skew, low-jitter copies of CLKIN x four. All outputs operate at the same frequency. Output duty cycles are adjusted to 50%, independent of duty cycle at CLKIN. The device automatically goes into power-down mode when no input signal is applied to CLKIN and the outputs go into a low state. Unlike many products containing PLLs, the CDCVF25084 does not require an external RC network. The loop filter for the PLL is included on-chip, minimizing component count, space, and cost.Because it is based on a PLL circuitry, the CDCVF25084 requires a stabilization time to achieve phase lock of the feedback signal to the reference signal. This stabilization is required following power up and application of a fixed-frequency signal at CLKIN and any following changes to the PLL reference.The CDCVF25084 is characterized for operation from –40°C to 85°C.

CDCVF25084PWR 数据手册

数据手册 说明 数量 操作
CDCVF25084PWR

3.3V x4 Clock Multiplier With 8 Outputs 16-TSSOP -40 to 85

15页,361K 查看
CDCVF25084PWRG4

3.3V x4 Clock Multiplier With 8 Outputs 16-TSSOP -40 to 85

15页,361K 查看

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