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  • 封装:16-DIP(0.300",7.62mm)
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:管件
  • 参考价格:$0.3146-$0.97

更新日期:2024-04-01 00:04:00

产品简介:高速 CMOS 逻辑可预设的同步 4 位二进制加/减计数器

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  • 封装:16-DIP(0.300",7.62mm)
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:管件
  • 参考价格:$0.3146-$0.97

CD74HCT191E 供应商

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  • 型号
  • 品牌
  • 封装/批号
  • 数量
  • 地区
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  • 说明
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CD74HCT191E 中文资料属性参数

  • 标准包装:25
  • 类别:集成电路 (IC)
  • 家庭:逻辑 -计数器,除法器
  • 系列:74HCT
  • 逻辑类型:二进制计数器
  • 方向:上,下
  • 元件数:1
  • 每个元件的位元数:4
  • 复位:-
  • 计时:同步
  • 计数速率:30MHz
  • 触发器类型:正边沿
  • 电源电压:4.5 V ~ 5.5 V
  • 工作温度:-55°C ~ 125°C
  • 安装类型:通孔
  • 封装/外壳:16-DIP(0.300",7.62mm)
  • 供应商设备封装:16-PDIP
  • 包装:管件
  • 其它名称:296-2141-574HCT191CD74HCT191

产品特性

  • 2-V to 6-V VCC Operation (’HC190,191)
  • 4.5-V to 5.5-V VCC Operation (’HCT191)
  • Wide Operating Temperature Range of –55 to 125°C
  • Synchronous Counting and Asynchronous Loading
  • Two Outputs for n-Bit Cascading
  • Look-Ahead Carry for High-Speed Counting
  • Balanced Propagation Delay and Transition Times
  • Standard Outputs Drive Up To 15 LS-TTL Loads
  • Significant Power Reduction Compared to LS-TTL Logic ICs

产品概述

The CD54/74HC190 are asynchronously presettable BCD decade counters, whereas the CD54/74HC191 and CD54/74HCT191 are asynchronously presettable binary counters.Presetting the counter to the number on preset data inputs (A–D) is accomplished by a low asynchronous parallel load (LOAD)\ input. Counting occurs when LOAD\ is high, count enable (CTEN)\ is low, and the down/up (D/U) input is either high for down counting or low for up counting. The counter is decremented or incremented synchronously with the low-to-high transition of the clock.When an overflow or underflow of the counter occurs, the MAX/MIN output, which is low during counting, goes high and remains high for one clock cycle. This output can be used for look-ahead carry in high-speed cascading (see Figure 1). The MAX/MIN output also initiates the ripple clock (RCO)\ output, which is normally high, goes low and remains low for the low-level portion of the clock pulse. These counters can be cascaded using RCO\ (see Figure 2).If a decade counter is preset to an illegal state or assumes an illegal state when power is applied, it returns to the normal sequence in one or two counts, as shown in the state diagrams (see Figure 3).

CD74HCT191E 数据手册

数据手册 说明 数量 操作
CD74HCT191E

High Speed CMOS Logic Presettable Synchronous 4-Bit Binary Up/Down Counters 16-PDIP -55 to 125

28页,796K 查看
CD74HCT191E

Counter IC Binary Counter 1 Element 4 Bit Positive Edge 16-PDIP

31页,1.2M 查看

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