您好,欢迎来到知芯网

更新日期:2024-04-01

产品简介:具有常见的并行 I/O 引脚和异步复位的 8 输入通用移位/存储寄存器

查看详情

CD54AC299F3A 供应商

  • 公司
  • 型号
  • 品牌
  • 封装/批号
  • 数量
  • 地区
  • 日期
  • 说明
  • 询价

CD54AC299F3A 中文资料属性参数

  • 现有数量:0现货2,082Factory
  • 价格:在售
  • 系列:*
  • 包装:管件
  • 产品状态:在售
  • 逻辑类型:-
  • 输出类型:-
  • 元件数:-
  • 每个元件位数:-
  • 功能:-
  • 电压 - 供电:-
  • 工作温度:-
  • 安装类型:-
  • 封装/外壳:-
  • 供应商器件封装:-

产品特性

  • Buffered Inputs
  • Typical propagation delay: 6 ns @ VCC = 5 V, TA = 25°C, CL = 50 pF
  • Exceeds 2-kV ESD Protection - MIL-STD-883, Method 3015
  • SCR-Latchup-resistant CMOS process and circuit design
  • Speed of bipolar FAST*/AS/S with significantly reduced power consumption
  • Balanced propagation delays
  • AC types feature 1.5-V to 5.5-V operation and balanced noise immunity at 30% of the supply
  • ±24-mA output drive current -Fanout to 15 FAST* ICs -Drives 50-ohm transmission lines
  • Characterized for operation from –40° to 85°C

产品概述

The RCA CD54/74AC299 and CD54/74AC323 and the CD54/74ACT299 and CD54/74ACT323 are 3-state, 8-input universal shift/storage registers with common parallel I/O pins. These devices use the RCA ADVANCED CMOS technology. These registers have four synchronous-operating modes controlled by the two select inputs as shown in the Mode Select (S0, S1) table. The Mode Select, the Serial Data (DSO, DS7), and the Parallel Data (I/O0 - I/O7) respond only to the LOW-TO-HIGH transition of the clock (CP) pulse. S0, S1 and Data inputs must be present one setup time prior to the positive transition of the clock.With the CD54/74AC/ACT 299, the Master Reset (MR\) is an asynchronous active-LOW input. When MR\ is LOW, the register is cleared regardless of the status of all other inputs. With the CD54/74AC/ACT323, the Master Reset (MR\) clears the register in sync with the clock input. The register can be expanded by cascading the same units by tying the serial output (QO) to the serial data (DS7) input of the preceding register, and tying the serial output (Q7) to the serial data (DSO) input of the following register. Recirculating the (n x 8) bits is accomplished by tying the Q7 of the last stage to the DSO of the first stage.The 3-state input/output (I/O) port has three modes of operation:The CD74AC/ACT299 and CD74AC/ACT323 are supplied in 20-lead dual-in-line plastic packages (E suffix) and in 20-lead dual-in-line small-outline plastic packages (M suffix). Both package types are operable over the following temperature ranges: Commercial (0 to 70°C); Industrial (-40 to +85°C); and Extended Industrial/Military (-55 to +125°C).The CD54AC/ACT299 and CD54AC/ACT323, available in chip form (H suffix), are operable over the -55 to +125°C temperature range.

CD54AC299F3A 数据手册

数据手册 说明 数量 操作
CD54AC299F3A

8-INPUT UNIVERSAL SHIFT/STORAGE REGISTER WITH COMMON PARALLEL I/O PINS

13 Pages页,433K 查看

IC 索引: A B C D E F G H I J K L M N O P Q R S T U V W X Y Z 0 1 2 3 4 5 6 7 8 9