更新日期:2024-04-01
产品简介:具有时钟和三态输出的 CMOS 4 位 D 类寄存器
查看详情CD4076BF3A 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
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DIP
2019+ -
5800
-
上海市
-
-
-
全新原装现货
-
TI
-
标准封装
23+ -
15000
-
上海市
-
-
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中国区代理原装现货特价热卖
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TI
-
CDIP
23+ -
5800
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上海市
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-
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进口原装现货,杜绝假货。
CD4076BF3A 中文资料属性参数
- 现有数量:0现货1,772Factory
- 价格:在售
- 系列:-
- 包装:管件
- 产品状态:在售
- 功能:标准
- 类型:D 型
- 输出类型:三态,非反相
- 元件数:1
- 每个元件位数:4
- 时钟频率:16 MHz
- 不同 V、最大 CL 时最大传播延迟:180ns @ 15V,50pF
- 触发器类型:正边沿
- 电流 - 输出高、低:6.8mA,6.8mA
- 电压 - 供电:3V ~ 18V
- 电流 - 静态 (Iq):100 μA
- 输入电容:5 pF
- 工作温度:-55°C ~ 125°C(TA)
- 安装类型:通孔
- 供应商器件封装:16-CDIP
- 封装/外壳:16-CDIP(0.300",7.62mm)
产品特性
- Three-state outputs
- Input disabled without gating the clock
- Gated output control lines for enabling or disabling the outputs
- Standardized, symmetrical output characteristics
- 100% tested for quiescent current at 20 V
- Maximum input current of 1 µA at 18 V over full package temperature range; 100 nA at 18 V and 25°C
- Noise margin over full package temperature range: 1 V at VDD = 5 V 2 V at VDD = 10 V 2.5 V at VDD = 15 V
- 1 V at VDD = 5 V
- 2 V at VDD = 10 V
- 2.5 V at VDD = 15 V
- 5-V, 10-V, and 15-V parametric ratings
- Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of B Series CMOS Devices"
产品概述
CD4076B types are four-bit registers consisting of D-type flip-flops that feature three-state outputs. Data Disable inputs are provided to control the entry of data into the flip-flops. When both Data Disable inputs are low, data at the D inputs are loaded into their respective flip-flops on the next positive transition of the clock input. Output Disable inputs are also provided. When the Output Disable inputs are both low, the normal logic states of the four outputs are available to the load. The outputs are disabled independently of the clock by a high logic level at either Output Disable input, and present a high impedance.The CD4076B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).
CD4076BF3A 数据手册
数据手册 | 说明 | 数量 | 操作 |
---|---|---|---|
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CMOS 4-BIT D-TYPE REGISTERS |
11 Pages页,520K | 查看 |
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