您好,欢迎来到知芯网
  • 封装:16-SOIC(0.209",5.30mm 宽)
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:Digi-Reel®
  • 参考价格:$0.1785-$0.5

更新日期:2024-04-01

产品简介:4 位幅度比较器

查看详情
  • 封装:16-SOIC(0.209",5.30mm 宽)
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:Digi-Reel®
  • 参考价格:$0.1785-$0.5

CD4063BNSR 供应商

  • 公司
  • 型号
  • 品牌
  • 封装/批号
  • 数量
  • 地区
  • 日期
  • 说明
  • 询价

CD4063BNSR 中文资料属性参数

  • 标准包装:1
  • 类别:集成电路 (IC)
  • 家庭:逻辑 - 比较器
  • 系列:4000B
  • 类型:幅值比较器
  • 位数:4
  • 输出:高有效
  • 输出功能:A<B,A=B,A>B
  • 电源电压:3 V ~ 18 V
  • 输出电流高,低:4.2mA,4.2mA
  • 额定电压和最大 CL 时的最大传播延迟:350ns @ 15V,50pF
  • 电流 - 静态:100µA
  • 工作温度:-55°C ~ 125°C
  • 封装/外壳:16-SOIC(0.209",5.30mm 宽)
  • 安装类型:表面贴装
  • 包装:®
  • 其它名称:296-14121-6

产品特性

  • Expansion to 8, 12, 16...4N bits by cascading units
  • Medium-speed operation: compares two 4-bit words in 250 ns (typ.) at 10 V
  • 100% tested for quiescent current at 20 V
  • Standardized symmetrical output characteristics
  • 5-V, 10-V, and 15-V parametric ratings
  • Maximum input current of 1 µA at 18 V over full package temperature range; 100 nA at 18 V and 25°C
  • Noise margin (full package temperature range) = 1 V at VDD = 5 V 2 V at VDD = 10 V 2.5 V at VDD = 15 V
  • 1 V at VDD = 5 V
  • 2 V at VDD = 10 V
  • 2.5 V at VDD = 15 V
  • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"
  • Applications Servo motor controls Process controllers
  • Servo motor controls
  • Process controllers

产品概述

CD4063B is a 4-bit magnitude comparator designed for use in computer and logic applications that require the comparison of two 4-bit words. This logic circuit determines whether one 4-bit word (Binary or BCD) is "less than", "equal to", or "greater than" a second 4-bit word.The CD4063B has eight comparing inputs (A3, B3, through A0, B0), three outputs (A < B, A = B, A > B) and three cascading inputs (A < B, A = B, A > B) that permit systems designers to expand the comparator function to 8, 12, 16 . . . 4N bits. When a single CD4063B is used, the cascading inputs are connected as follows: (A < B) = low, (A = B) = high, (A > B) = low. For words longer than 4 bits, CD4063B devices may be cascaded by connecting the outputs of the less-significant comparator to the corresponding cascading inputs of the more-significant comparator. Cascading inputs (A < B, A = B, and A > B) on the least significant comparator are connected to a low, a high, and a low level, respectively.The CD4063B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes). This device is pin-compatible with the standard 7485 TTL type.

CD4063BNSR 数据手册

数据手册 说明 数量 操作
CD4063BNSR

Magnitude Comparator 4 Bit Active High Output A<B, A=B, A>B 16-SO

14页,876K 查看

IC 索引: A B C D E F G H I J K L M N O P Q R S T U V W X Y Z 0 1 2 3 4 5 6 7 8 9