更新日期:2024-04-01
产品简介:具有异步清零功能的 CMOS 同步可编程 4 位十进制计数器
查看详情CD40160BF3A 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
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HAR
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-
2019+ -
5800
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上海市
-
-
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全新原装现货
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HAR
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DIP-S20P
23+ -
15000
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上海市
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-
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中国区代理原装特价热卖
CD40160BF3A 中文资料属性参数
- 现有数量:0现货2,623Factory
- 价格:在售
- 系列:4000B
- 包装:管件
- 产品状态:在售
- 逻辑类型:计数器,十进制
- 方向:上
- 元件数:1
- 每个元件位数:4
- 复位:异步
- 定时:同步
- 计数速率:12 MHz
- 触发器类型:正边沿
- 电压 - 供电:3 V ~ 18 V
- 工作温度:-55°C ~ 125°C(TA)
- 安装类型:通孔
- 封装/外壳:16-CDIP(0.300",7.62mm)
- 供应商器件封装:16-CDIP
产品特性
- Internal look-ahead for fast counting
- Carry output for cascading
- Synchronously programmable
- Clear asynchronous input (CD40160B, CD40161B)
- Clear synchronous input (CD40162B, CD40163B)
- Synchronous load control input
- Low-power TTL compatibility
- Standardized, symmetrical output characteristics
- 100% tested for quiescent current at 20 V
- Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
- Noise margin (full package temperature range): 1 V at VDD = 5 V 2 V at VDD = 10 V 2.5 V at VDD = 15 V
- 1 V at VDD = 5 V
- 2 V at VDD = 10 V
- 2.5 V at VDD = 15 V
- 5-V, 10-V, and 15-V parametric ratings
- Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"
- Applications Programmable binary and decade counting Counter control/timers Frequency dividing
- Programmable binary and decade counting
- Counter control/timers
- Frequency dividing
产品概述
CD40160B, CD40161B, CD40162B, and CD40163B are 4-bit synchronous programmable counters. The CLEAR function of the CD40162B and CD40163B is synchronous and a low level at the CLEAR\ input sets all four outputs low on the next positive CLOCK edge. The CLEAR function of the CD40160B and CD40161B is asynchronous and a low level at the CLEAR\ input sets all four outputs low regardless of the state of the CLOCK, LOAD\, or ENABLE inputs. A low level at the LOAD\ input disables the counter and causes the output to agree with the setup data after the next CLOCK pulse regardless of the conditions of the ENABLE inputs.The carry look-ahead circuitry provides for cascading counters for n-bit synchronous applications without additional gating. Instrumental in accomplishing this function are two count-enable inputs and a carry output (COUT). Counting is enabled when both PE and TE inputs are high. The TE input is fed forward to enable COUT. This enabled output produces a positive output pulse with a duration approximately equal to the positive portion of the Q1 output. This positive overflow carry pulse can be used to enable successive cascaded stages. Logic transitions at the PE or TE inputs may occur when the clock is either high or low.The CD40160B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix). The CD40161B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (NSR suffix), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).The CD40160B through CD40163B types are functionally equivalent to and pin-compatible with the TTL counter series 74LS160 through 74LS163 respectively.
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