更新日期:2024-04-01
产品简介:军用 2 通道、4 输入、3V 至 18V 或非门
查看详情CD4002BF3A 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
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TI厂商
-
模块
23+ -
15000
-
上海市
-
-
-
中国区代理原装进口特价
-
TI
-
DIP
22+ -
5000
-
常州
-
-
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原装现货热卖
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TI
-
CDIP
23+ -
5800
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上海市
-
-
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进口原装现货,杜绝假货。
-
TI
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DIP
- -
5
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台州
-
-
CD4002BF3A 中文资料属性参数
- 现有数量:0现货2,175Factory
- 价格:在售
- 系列:-
- 包装:管件
- 产品状态:在售
- 逻辑类型:或非门
- 电路数:2
- 输入数:4
- 特性:-
- 电压 - 供电:3V ~ 18V
- 电流 - 静态(最大值):5 μA
- 电流 - 输出高、低:6.8mA,6.8mA
- 逻辑电平 - 低:1.5V ~ 4V
- 逻辑电平 - 高:3.5V ~ 11V
- 不同 V、最大 CL 时最大传播延迟:90ns @ 15V,50pF
- 工作温度:-55°C ~ 125°C
- 安装类型:通孔
- 供应商器件封装:14-CDIP
- 封装/外壳:14-CDIP(0.300",7.62mm)
产品特性
- Propagation delay time = 60 ns (typ.) at CL = 50 pF, VDD = 10 V
- Buffered inputs and outputs
- Standardized symmetrical output characteristics
- 100% tested for maximum quiescent current at 20 V
- 5-V, 10-V, and 15-V parametric ratings
- Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
- Noise margin (over full package temperature range): 1 V at VDD = 5 V 2 V at VDD = 10 V 2.5 V at VDD = 15 V
- Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of B Series CMOS Devices"
产品概述
CD4001B, CD4002B, and CD4025B NOR gates provide the system designer with direct implementation of the NOR function
and supplement the existing family of CMOS gates. All inputs and outputs are buffered.The CD4001B, CD4002B, and CD4025B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix),
14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and
14-lead thin shrink small-outline packages (PW and PWR suffixes).
CD4002BF3A 数据手册
数据手册 | 说明 | 数量 | 操作 |
---|---|---|---|
![]() |
CMOS NOR Gates |
12 Pages页,524K | 查看 |
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