- 封装:14-SOIC(0.154",3.90mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:带卷 (TR)
- 参考价格:$0.131
更新日期:2024-04-01
产品简介:4 通道、双输入、3V 至 18V 或非门
查看详情- 封装:14-SOIC(0.154",3.90mm 宽)
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:带卷 (TR)
- 参考价格:$0.131
CD4001BM96G4 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
-
TI
-
原厂原装
22+ -
3288
-
上海市
-
-
-
一级代理原装
CD4001BM96G4 中文资料属性参数
- 标准包装:2,500
- 类别:集成电路 (IC)
- 家庭:逻辑 - 栅极和逆变器
- 系列:4000B
- 逻辑类型:或非门
- 电路数:4
- 输入数:2
- 特点:-
- 电源电压:3 V ~ 18 V
- 电流 - 静态(最大值):1µA
- 输出电流高,低:3.4mA,3.4mA
- 逻辑电平 - 低:1.5 V ~ 4 V
- 逻辑电平 - 高:3.5 V ~ 11 V
- 额定电压和最大 CL 时的最大传播延迟:90ns @ 15V,50pF
- 工作温度:-55°C ~ 125°C
- 安装类型:表面贴装
- 供应商设备封装:14-SOIC
- 封装/外壳:14-SOIC(0.154",3.90mm 宽)
- 包装:带卷 (TR)
产品特性
- Propagation delay time = 60 ns (typ.) at CL = 50 pF, VDD = 10 V
- Buffered inputs and outputs
- Standardized symmetrical output characteristics
- 100% tested for maximum quiescent current at 20 V
- 5-V, 10-V, and 15-V parametric ratings
- Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
- Noise margin (over full package temperature range): 1 V at VDD = 5 V 2 V at VDD = 10 V 2.5 V at VDD = 15 V
- Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of B Series CMOS Devices"
产品概述
CD4001B, CD4002B, and CD4025B NOR gates provide the system designer with direct implementation of the NOR function
and supplement the existing family of CMOS gates. All inputs and outputs are buffered.The CD4001B, CD4002B, and CD4025B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix),
14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and
14-lead thin shrink small-outline packages (PW and PWR suffixes).
CD4001BM96G4 数据手册
数据手册 | 说明 | 数量 | 操作 |
---|---|---|---|
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CMOS Quad 2-Input NOR Gate 14-SOIC -55 to 125 |
16页,704K | 查看 |
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