ATMEGA32A-AU

■Features 1. Highly reliable connection and robust structure Multi-polarized connectors, reinforced body structure and high FPC retention produced by the following features: Reliable connection created by its unique FPC/FFC positioning mechanism Prevents accidental disengagement with the design of its proprietary structure 2. Simplified operations The flip lock structure makes it easier to engage/disengage the actuator and reduces the required force needed to operate. A clear tactile click is delivered upon the successful completion of the mating process. 3. Increased FPC/FFC retention force Vertical retention force for the FPC/FFC is 2.5 times stronger than our 0.5 mm pitch connector the FH12 series. Horizontal retention force for the FPC/FFC is 2 times stronger than our 0.5 mm pitch connector the FH12 series *To realize the horizontal retention force values, the use of the FPC positioning tabs are required. FPC without the positioning tabs will comply with the specifications rated

8155AS–AVR–06/08 Features ? High-performance, Low-power AVR ? 8-bit Microcontroller ? Advanced RISC Architecture – 131 Powerful Instructions – Most Single-clock Cycle Execution – 32 x 8 General Purpose Working Registers – Fully Static Operation – Up to 16 MIPS Throughput at 16 MHz – On-chip 2-cycle Multiplier ? High Endurance Non-volatile Memory segments – 32K Bytes of In-System Self-programmable Flash program memory – 1024 Bytes EEPROM – 2K Byte Internal SRAM – Write/Erase Cycles: 10,000 Flash/100,000 EEPROM – Data retention: 20 years at 85°C/100 years at 25°C (1) – Optional Boot Code Section with Independent Lock Bits ? In-System Programming by On-chip Boot Program ? True Read-While-Write Operation – Programming Lock for Software Security ? JTAG (IEEE std. 1149.1 Compliant) Interface – Boundary-scan Capabilities According to the JTAG Standard – Extensive On-chip Debug Support – Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface ? Peripheral Features – Two

8155AS–AVR–06/08 Features ? High-performance, Low-power AVR ? 8-bit Microcontroller ? Advanced RISC Architecture – 131 Powerful Instructions – Most Single-clock Cycle Execution – 32 x 8 General Purpose Working Registers – Fully Static Operation – Up to 16 MIPS Throughput at 16 MHz – On-chip 2-cycle Multiplier ? High Endurance Non-volatile Memory segments – 32K Bytes of In-System Self-programmable Flash program memory – 1024 Bytes EEPROM – 2K Byte Internal SRAM – Write/Erase Cycles: 10,000 Flash/100,000 EEPROM – Data retention: 20 years at 85°C/100 years at 25°C (1) – Optional Boot Code Section with Independent Lock Bits ? In-System Programming by On-chip Boot Program ? True Read-While-Write Operation – Programming Lock for Software Security ? JTAG (IEEE std. 1149.1 Compliant) Interface – Boundary-scan Capabilities According to the JTAG Standard – Extensive On-chip Debug Support – Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface ? Peripheral Features – Two

■Features 1. Highly reliable connection and robust structure Multi-polarized connectors, reinforced body structure and high FPC retention produced by the following features: Reliable connection created by its unique FPC/FFC positioning mechanism Prevents accidental disengagement with the design of its proprietary structure 2. Simplified operations The flip lock structure makes it easier to engage/disengage the actuator and reduces the required force needed to operate. A clear tactile click is delivered upon the successful completion of the mating process. 3. Increased FPC/FFC retention force Vertical retention force for the FPC/FFC is 2.5 times stronger than our 0.5 mm pitch connector the FH12 series. Horizontal retention force for the FPC/FFC is 2 times stronger than our 0.5 mm pitch connector the FH12 series *To realize the horizontal retention force values, the use of the FPC positioning tabs are required. FPC without the positioning tabs will comply with the specifications rated