- 封装:64-VFQFN 裸露焊盘
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:Digi-Reel®
- 参考价格:$104.625-$99.2252
更新日期:2024-04-01 00:04:00
产品简介:双通道、11 位、200MSPS 模数转换器 (ADC)
查看详情- 封装:64-VFQFN 裸露焊盘
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:Digi-Reel®
- 参考价格:$104.625-$99.2252
ADS62C17IRGCT 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
-
TI
-
原厂原装
22+ -
3288
-
上海市
-
-
-
一级代理原装
-
TI/德州仪器
-
VQFN64
21+ -
10000
-
杭州
-
-
-
只做原装现货,大量现货热卖
-
TI(德州仪器)
-
VQFN-64(9x9)
2022+ -
12000
-
上海市
-
-
-
原装可开发票
-
TI
-
VQFN64
21+ -
4500
-
上海市
-
-
-
原装现货,品质为先!请来电垂询!
-
TI/BB
-
64VQFN
23+ -
5800
-
上海市
-
-
-
进口原装现货,杜绝假货。
ADS62C17IRGCT 中文资料属性参数
- 标准包装:1
- 类别:集成电路 (IC)
- 家庭:数据采集 - 模数转换器
- 系列:-
- 位数:11
- 采样率(每秒):200M
- 数据接口:串行,并联
- 转换器数目:2
- 功率耗散(最大):1.1W
- 电压电源:模拟和数字
- 工作温度:-40°C ~ 85°C
- 安装类型:表面贴装
- 封装/外壳:64-VFQFN 裸露焊盘
- 供应商设备封装:64-VQFN 裸露焊盘(9x9)
- 包装:®
- 输入数目和类型:2 个差分,单极
- 其它名称:296-24232-6
产品特性
- Maximum Sample Rate: 200 MSPS
- 11-bit Resolution with No Missing Codes
- 90 dBc SFDR at Fin = 10 MHz
- 79.8 dBFS SNR at 125 MHz IF, 20 MHz BW using TI proprietary SNRBoost technology
- Total Power 1.1 W at 200 MSPS
- 90 dB Cross-talk
- Double Data Rate (DDR) LVDS and Parallel CMOS Output Options
- Programmable Gain up to 6dB for SNR/SFDR Trade-off
- DC Offset Correction
- Gain Tuning Capability in Fine Steps (0.001 dB) Allows Channel-to-channel Gain Matching
- Supports Input Clock Amplitude Down to 400 mV p-p Differential
- Internal and External Reference Support
- 64-QFN Package (9 mm × 9 mm)
产品概述
ADS62C17 is a dual channel 11-bit, 200 MSPS A/D converter that combines high dynamic performance and low power consumption in a compact 64 QFN package. This makes it well-suited for multi-carrier, wide band-width communications applications.ADS62C17 uses TI-proprietary SNRBoost technology that can be used to overcome SNR limitation due to quantization noise for bandwidths less than Nyquist (Fs/2). It includes several useful and commonly used digital functions such as ADC offset correction, gain (0 to 6 dB in steps of 0.5 dB) and gain tuning (in fine steps of 0.001 dB).The gain option can be used to improve SFDR performance at lower full-scale input ranges. Using the gain tuning capability, each channels gain can be set independently to improve channel-to-channel gain matching. The device also includes a dc offset correction loop that can be used to cancel the ADC offset.Both DDR LVDS (Double Data Rate) and parallel CMOS digital output interfaces are available. It includes internal references while the traditional reference pins and associated decoupling capacitors have been eliminated. Nevertheless, the device can also be driven with an external reference.The device is specified over the industrial temperature range (40°C to 85°C).
ADS62C17IRGCT 电路图

ADS62C17IRGCT 电路图
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