您好,欢迎来到知芯网
  • 封装:32-VFQFN 裸露焊盘
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:带卷 (TR)
  • 参考价格:$24.57

更新日期:2024-04-01 00:04:00

产品简介:12 位、80MSPS 模数转换器 (ADC)

查看详情
  • 封装:32-VFQFN 裸露焊盘
  • RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
  • 包装方式:带卷 (TR)
  • 参考价格:$24.57

ADS61B23IRHBR 供应商

  • 公司
  • 型号
  • 品牌
  • 封装/批号
  • 数量
  • 地区
  • 日期
  • 说明
  • 询价

ADS61B23IRHBR 中文资料属性参数

  • 产品培训模块:Data Converter Basics
  • 标准包装:3,000
  • 类别:集成电路 (IC)
  • 家庭:数据采集 - 模数转换器
  • 系列:-
  • 位数:12
  • 采样率(每秒):80M
  • 数据接口:串行,并联
  • 转换器数目:1
  • 功率耗散(最大):-
  • 电压电源:模拟和数字
  • 工作温度:-40°C ~ 85°C
  • 安装类型:表面贴装
  • 封装/外壳:32-VFQFN 裸露焊盘
  • 供应商设备封装:32-QFN 裸露焊盘(5x5)
  • 包装:带卷 (TR)
  • 输入数目和类型:1 个差分,单极
  • 配用:296-30678-ND - EVAL MODULE FOR ADS61B23

产品特性

  • Maximum Sample Rate: 80 MSPS
  • 12-bit Resolution with No Missing Codes
  • Buffered Analog Inputs with Very Low Input Capacitance (< 2 pF)High DC Resistance (5 k)
  • Very Low Input Capacitance (< 2 pF)
  • High DC Resistance (5 k)
  • 82 dBc SFDR and 70 dBFS SNR(-1 BFS or 1.8 Vpp input)
  • 85 dBc SFDR (-6 dBFS or 1 Vpp input)
  • 3.5 dB Coarse Gain and up to 6 dB Programmable Fine Gain for SNR and SFDR Trade-Off
  • Parallel CMOS and Double Data Rate (DDR) LVDS Output Options
  • Supports Sine, LVCMOS, LVPECL, LVDS Clock Inputs and Clock Amplitude Down to 400 mVPP
  • Clock Duty Cycle Stabilizer
  • Internal Reference with Support for External Reference
  • External Decoupling Eliminated for References
  • Programmable Output Clock Position and Drive Strength to Ease Data Capture
  • 3.3 V Analog and 1.8 V to 3.3 V Digital Supply
  • 32-pin QFN Package (5 mm × 5 mm)
  • Pin Compatible 12-Bit Family (ADS612X)
  • Temperature range -40°C to 85°C
  • APPLICATIONS Wireless Communications InfrastructureSoftware Defined RadioPower Amplifier Linearization802.16d/eTest and Measurement InstrumentationHigh Definition VideoMedical ImagingRadar Systems
  • Wireless Communications Infrastructure
  • Software Defined Radio
  • Power Amplifier Linearization
  • 802.16d/e
  • Test and Measurement Instrumentation
  • High Definition Video
  • Medical Imaging
  • Radar Systems

产品概述

ADS61B23 is a 12-bit A/D converter (ADC) with a maximum sampling frequency of 80 MSPS. It combines high performance and low power consumption in a compact 32-QFN package. The analog inputs use buffers to isolate the switching transients of the internal sample & hold from the external driving circuit. The buffered inputs present very low input capacitance (< 2pF) & wide bandwidth. This makes it easy to drive them at high input frequencies, compared to an ADC without the input buffers.ADS61B23 has coarse and fine gain options that are used to improve SFDR performance at lower full-scale analog input ranges.The digital data outputs are parallel CMOS or DDR LVDS (Double Data Rate). Several features exist to ease data capture—controls for output clock position and output buffer drive strength, plus LVDS current and internal termination programmability. The output interface type, gain, and other functions are programmed using a 3-wire serial interface. Alternatively, some of these functions are configured using dedicated parallel pins so the device starts in the desired state after power-up. ADS61B23 includes internal references, while eliminating the traditional reference pins and associated external decoupling. External reference mode is also supported.

ADS61B23IRHBR 电路图

ADS61B23IRHBR 电路图

ADS61B23IRHBR 电路图

IC 索引: A B C D E F G H I J K L M N O P Q R S T U V W X Y Z 0 1 2 3 4 5 6 7 8 9