- 封装:80-TQFP 裸露焊盘
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:带卷 (TR)
- 参考价格:$134.34
更新日期:2024-04-01 00:04:00
产品简介:四通道、11 位、200MSPS 模数转换器 (ADC)
查看详情- 封装:80-TQFP 裸露焊盘
- RoHS:无铅 / 符合限制有害物质指令(RoHS)规范要求
- 包装方式:带卷 (TR)
- 参考价格:$134.34
ADS58C48IPFPR 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
-
TI
-
原厂原装
22+ -
3288
-
上海市
-
-
-
一级代理原装
-
TI/德州仪器
-
HTQFP80
21+ -
10000
-
杭州
-
-
-
原装正品,BOM一站式服务
-
TI(德州仪器)
-
TQFP-80
2022+ -
9
-
上海市
-
-
-
原装可开发票
-
-
23+ -
46000
-
合肥
-
-
-
科大讯飞战略投资企业,提供一站式配套服务
ADS58C48IPFPR 中文资料属性参数
- 标准包装:1,000
- 类别:集成电路 (IC)
- 家庭:数据采集 - ADCs/DAC - 专用型
- 系列:-
- 类型:ADC
- 分辨率(位):11 b
- 采样率(每秒):200M
- 数据接口:串行,并联
- 电压电源:模拟和数字
- 电源电压:1.7 V ~ 1.9 V
- 工作温度:-40°C ~ 85°C
- 安装类型:表面贴装
- 封装/外壳:80-TQFP 裸露焊盘
- 供应商设备封装:80-HTQFP(12x12)
- 包装:带卷 (TR)
产品特性
- Maximum Sample Rate: 200 MSPS
- High Dynamic Performance SFDR 82 dBc at 140 MHz 72.3 dBFS SNR in 60 MHz BW Using SNRBoost3G technology
- SFDR 82 dBc at 140 MHz
- 72.3 dBFS SNR in 60 MHz BW Using SNRBoost3G technology
- SNRBoost3G Highlights Supports Wide Bandwidth up to 60 MHz Programmable Bandwidths – 60 MHz, 40 MHz, 30 MHz, 20 MHz Flat Noise Floor within the Band Independent SNRBoost3G Coefficients for Every Channel
- Supports Wide Bandwidth up to 60 MHz
- Programmable Bandwidths – 60 MHz, 40 MHz, 30 MHz, 20 MHz
- Flat Noise Floor within the Band
- Independent SNRBoost3G Coefficients for Every Channel
- Output Interface Double Data Rate (DDR) LVDS with Programmable Swing and Strength Standard Swing: 350mV Low Swing: 200mV Default Strength: 100 Termination 2x Strength: 50 Termination 1.8V Parallel CMOS Interface Also Supported
- Double Data Rate (DDR) LVDS with Programmable Swing and Strength Standard Swing: 350mV Low Swing: 200mV Default Strength: 100 Termination 2x Strength: 50 Termination
- Standard Swing: 350mV
- Low Swing: 200mV
- Default Strength: 100 Termination
- 2x Strength: 50 Termination
- 1.8V Parallel CMOS Interface Also Supported
- Ultra-Low Power with Single 1.8V Supply 0.9W Total Power 1.32 W Total Power (200 MSPS) with SNRBoost3G on all 4 Channels 1.12 W Total Power (200 MSPS) with SNRBoost3G on 2 Channels
- 0.9W Total Power
- 1.32 W Total Power (200 MSPS) with SNRBoost3G on all 4 Channels
- 1.12 W Total Power (200 MSPS) with SNRBoost3G on 2 Channels
- Programmable Gain up to 6dB for SNR/SFDR Trade-Off
- DC Offset Correction
- Supports Low Input Clock Amplitude
- 80-TQFP Package
产品概述
The ADS58C48 is a quad channel 11-bit A/D converter with sampling rate up to 200 MSPS. It uses innovative design techniques to achieve high dynamic performance, while consuming extremely low power at 1.8V supply. This makes it well-suited for multi-carrier, wide band-width communications applications.The ADS58C48 uses third-generation SNRBoost3G technology to overcome SNR limitation due to quantization noise (for bandwidths < Nyquist, Fs/2). Enhancements in the SNRBoost3G technology allow support for SNR improvements over wide bandwidths (up to 60 MHz). In addition, separate SNRBoost3G coefficients can be programmed for each channel.The device has digital gain function that can be used to improve SFDR performance at lower full-scale input ranges. It includes a dc offset correction loop that can be used to cancel the ADC offset.The digital outputs of all channels are output as DDR LVDS (Double Data Rate) together with an LVDS clock output. The low data rate of this interface (400Mbps at 200 MSPS sample rate) makes it possible to use low-cost FPGA-based receivers. The strength of the LVDS output buffers can be increased to support 50 ohms differential termination. This allows the output clock signal to be connected to two separate receiver chips with an effective 50 termination (such as the two clock ports of the GC5330).The same digital output pins can also be configured as a parallel 1.8V CMOS interface.It includes internal references while the traditional reference pins and associated decoupling capacitors have been eliminated. The device is specified over the industrial temperature range (–40°C to 85°C).
ADS58C48IPFPR 电路图

ADS58C48IPFPR 电路图
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