- 参考价格:¥504.74-¥571.32
更新日期:2024-04-01 00:04:00
产品简介:16 位、130MSPS 模数转换器 (ADC)
查看详情- 参考价格:¥504.74-¥571.32
ADC16V130CISQE/NOPB 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
-
National Semiconductor
-
WQFN64
21+ -
250
-
上海市
-
-
-
一级代理原装
-
TI
-
BGA
21+ -
577
-
上海市
-
-
-
原装现货!品质为先!请来电垂询!
ADC16V130CISQE/NOPB 中文资料属性参数
- 制造商:National Semiconductor (TI)
- 转换器数量:1
- ADC 输入端数量:1
- 结构:Pipelined
- 转换速率:130000 KSPs
- 分辨率:16 bit
- 输入类型:Voltage
- 接口类型:Parallel, LVDS
- 信噪比:78.5 dB
- 电压参考:Internal, External
- Supply Voltage - Max:1.9 V, 3.6 V
- Supply Voltage - Min:1.7 V, 2.7 V
- 最大工作温度:+ 85 C
- 封装 / 箱体:LLP EP
- 封装:Reel
- 最小工作温度:- 40 C
- 工作电源电压:1.8 V, 3 V
- 工厂包装数量:250
产品特性
- Dual Supplies: 1.8V and 3.0V Operation
- On Chip Automatic Calibration During Power-Up
- Low Power Consumption
- Multi-Level Multi-Function Pins for CLK/DF and PD
- Power-Down and Sleep Modes
- On Chip Precision Reference and Sample-and-Hold Circuit
- On Chip Low Jitter Duty-Cycle Stabilizer
- Offset Binary or 2's Complement Data Format
- Full Data Rate LVDS Output Port
- 64-pin WQFN Package (9x9x0.8, 0.5mm Pin-Pitch)
- High IF Sampling Receivers
- Multi-carrier Base Station Receivers GSM/EDGE, CDMA2000, UMTS, LTE, and WiMax
- GSM/EDGE, CDMA2000, UMTS, LTE, and WiMax
- Test and Measurement Equipment
- Communications Instrumentation
- Data Acquisition
- Portable Instrumentation
产品概述
The ADC16V130 is a monolithic high performance CMOS analog-to-digital converter capable
of converting analog input signals into 16-bit digital words at rates up to 130 Mega Samples Per
Second (MSPS). This converter uses a differential, pipelined architecture with digital error
correction and an on-chip sample-and-hold circuit to minimize power consumption and external
component count while providing excellent dynamic performance. Automatic power-up calibration
enables excellent dynamic performance and reduces part-to-part variation, and the ADC16V130 could
be re-calibrated at any time by asserting and then de-asserting power-down. An integrated low noise
and stable voltage reference and differential reference buffer amplifier easies board level design.
On-chip duty cycle stabilizer with low additive jitter allows wide duty cycle range of input clock
without compromising its dynamic performance. A unique sample-and-hold stage yields a full-power
bandwidth of 1.4 GHz. The digital data is provided via full data rate LVDS outputs – making
possible the 64-pin, 9mm x 9mm WQFN package. The ADC16V130 operates on dual power supplies +1.8V
and +3.0V with a power-down feature to reduce the power consumption to very low levels while
allowing fast recovery to full operation.
ADC16V130CISQE/NOPB 电路图
ADC16V130CISQE/NOPB 电路图
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