- 参考价格:¥463.89
更新日期:2024-04-01 00:04:00
ADC11DV200CISQX/NOPB 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
-
TI
-
原厂原装
22+ -
3288
-
上海市
-
-
-
一级代理原装
-
TI(德州仪器)
-
WQFN-60(9x9)
2022+ -
12000
-
上海市
-
-
-
原装可开发票
ADC11DV200CISQX/NOPB 中文资料属性参数
- 制造商:National Semiconductor (TI)
- 转换器数量:2
- ADC 输入端数量:2
- 结构:Pipelined
- 转换速率:200000 KSPs
- 分辨率:11 bit
- 输入类型:Voltage
- 接口类型:Parallel, LVDS
- 信噪比:63.8 dB
- 电压参考:Internal, External
- Supply Voltage - Max:1.9 V
- Supply Voltage - Min:1.7 V
- 最大工作温度:+ 85 C
- 封装 / 箱体:LLP EP
- 封装:Reel
- 最小工作温度:- 40 C
- 工作电源电压:1.8 V
- 工厂包装数量:2000
产品特性
- Single 1.8V Power Supply Operation.
- Power Scaling with Clock Frequency.
- Internal Sample-and-Hold.
- Internal or External Reference.
- Power Down Mode.
- Offset Binary or 2's Complement Output Data Format.
- LVDS or CMOS Output Signals.
- 60-Pin WQFN Package, (9x9x0.8mm, 0.5mm Pin-Pitch)
- Clock Duty Cycle Stabilizer.
- IF Sampling Bandwidth > 900MHz.
- Resolution: 11 Bits
- Conversion Rate: 200 MSPS
- ENOB: 10.06 bits (typ) @Fin=70 MHz
- SNR: 62.5 dBFS (typ) @Fin=70 MHz
- SINAD: 62.3 dBFS (typ) @Fin=70 MHz
- SFDR: 82 dBFS (typ) @Fin=70 MHz
- LVDS: Power 450 mW (typ) @Fs=200 MSPS
- CMOS: Power 280 mW (typ) @Fs=170 MSPS
- Operating Temp. Range: −40°C to +85°C.
产品概述
The ADC11DV200 is a monolithic analog-to-digital converter capable of converting two
analog input signals into 11-bit digital words at rates up to 200 Mega Samples Per Second (MSPS).
The digital output mode is selectable and can be either differential LVDS or CMOS signals. This
converter uses a differential, pipelined architecture with digital error correction and an on-chip
sample-and-hold circuit to minimize die size and power consumption while providing excellent
dynamic performance. A unique sample-and-hold stage yields a full-power bandwidth of 900MHz.
Fabricated in core CMOS process, the ADC11DV200 may be operated from a single 1.8V power supply.
The ADC11DV200 achieves approximately 10.06 effective bits at Nyquist and consumes just 280mW at
170MSPS in CMOS mode 450mW at 200MSPS in LVDS mode. The power consumption can be scaled down
further by reducing sampling rates.
ADC11DV200CISQX/NOPB 电路图

ADC11DV200CISQX/NOPB 电路图
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