更新日期:2024-04-01 00:04:00
产品简介:双通道、8 位、500MSPS 模数转换器 (ADC)
查看详情ADC08D502CIYB/NOPB 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
-
TI
-
原厂原装
22+ -
3288
-
上海市
-
-
-
一级代理原装
ADC08D502CIYB/NOPB 中文资料属性参数
- 现有数量:0现货1,080Factory查看交期
- 价格:60 : ¥681.05217托盘
- 系列:-
- 包装:托盘
- 产品状态:在售
- 位数:8
- 采样率(每秒):500M
- 输入数:2
- 输入类型:差分
- 数据接口:LVDS - 并联
- 配置:MUX-S/H-ADC
- 比率 - S/H:ADC:1:1
- A/D 转换器数:2
- 架构:折叠内插
- 参考类型:内部
- 电压 - 供电,模拟:1.8V ~ 2V
- 电压 - 供电,数字:1.8V ~ 2V
- 特性:同步采样
- 工作温度:-40°C ~ 85°C
- 封装/外壳:128-LQFP 裸露焊盘
- 供应商器件封装:128-HLQFP(20x20)
- 安装类型:表面贴装型
产品特性
- Internal Sample-and-Hold
- Single +1.9V ±0.1V Operation
- Choice of SDR or DDR Output Clocking
- Multiple ADC Synchronization Capability
- Specified No Missing Codes
- Serial Interface for Extended Control
- Fine Adjustment of Input Full-Scale Range and Offset
- Duty Cycle Corrected Sample Clock
- Resolution: 8 Bits
- Max Conversion Rate: 500 MSPS (min)
- Bit Error Rate: 10-18 (typ)
- ENOB @ 250 MHz Input: 7.5 Bits (typ)
- DNL: ±0.15 LSB (typ)
- Power ConsumptionOperating: 1.4 W (typ)Power Down Mode: 3.5 mW (typ)
- Operating: 1.4 W (typ)
- Power Down Mode: 3.5 mW (typ)
产品概述
The ADC08D502 is a dual, low power, high performance CMOS analog-to-digital converter
that digitizes signals to 8 bits resolution at sampling rates up to 500 MSPS. Consuming a typical
1.4 Watts at 500 MSPS from a single 1.9 Volt supply, this device is specified to have no missing
codes over the full operating temperature range. The unique folding and interpolating architecture,
the fully differential comparator design, the innovative design of the internal sample-and-hold
amplifier and the self-calibration scheme enable a very flat response of all dynamic parameters
beyond Nyquist, producing a high 7.5 ENOB with a 250 MHz input signal and a 500 MHz sample rate
while providing a 10-18 B.E.R. Output formatting is offset binary and
the LVDS digital outputs are compatible with IEEE 1596.3-1996, with the exception of an adjustable
common mode voltage between 0.8V and 1.2V.Each converter has a 1:2 demultiplexer that feeds two LVDS buses and reduces the output
data rate on each bus to half the sampling rate. The converter typically consumes less than 3.5 mW in the Power Down Mode and is available
in a 128-lead, thermally enhanced exposed pad HLQFP and operates over the Industrial (-40°C ≤
TA ≤ +85°C) temperature range.
ADC08D502CIYB/NOPB 数据手册
| 数据手册 | 说明 | 数量 | 操作 |
|---|---|---|---|
ADC08D502CIYB/NOPB
|
8 Bit Analog to Digital Converter 2 Input 2 Folding Interpolating 128-HLQFP (20x20) |
48页,898K | 查看 |
ADC08D502CIYB/NOPB 电路图
ADC08D502CIYB/NOPB 电路图
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ADC08D502CIYB/NOPB