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更新日期:2024-04-01

产品简介:并联负载 8 位移位寄存器

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84095012A 供应商

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84095012A 中文资料属性参数

  • 现有数量:0现货2,063Factory
  • 价格:在售
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  • 包装:管件
  • 产品状态:在售
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产品特性

  • Wide Operating Voltage Range of 2 V to 6 V
  • Outputs Can Drive Up to 10 LSTTL Loads
  • Low Power Consumption, 80-µA Maximum ICC
  • Typical tpd = 13 ns
  • ±4-mA Output Drive at 5 V
  • Low Input Current of 1 µA Maximum
  • Complementary Outputs
  • Direct Overriding Load (Data) Inputs
  • Gated Clock Inputs
  • Parallel-to-Serial Data Conversion
  • On Products Compliant to MIL-PRF-38535, All Parameters Are Tested Unless Otherwise Noted. On All Other Products, Production Processing Does Not Necessarily Include Testing of All Parameters.

产品概述

The SNx4HC165 devices are 8-bit parallel-load shift registers that, when clocked, shift the data toward a serial (QH) output. Parallel-in access to each stage is provided by eight individual direct data (A–H) inputs that are enabled by a low level at the shift/load (SH/LD) input. The SNx4HC165 devices also feature a clock-inhibit (CLK INH) function and a complementary serial (QH) output.Clocking is accomplished by a low-to-high transition of the clock (CLK) input while SH/LD is held high and CLK INH is held low. The functions of CLK and CLK INH are interchangeable. Because a low CLK and a low-to-high transition of CLK INH also accomplish clocking, CLK INH must be changed to the high level only while CLK is high. Parallel loading is inhibited when SH/LD is held high. While SH/LD is low, the parallel inputs to the register are enabled independently of the levels of the CLK, CLK INH, or serial (SER) inputs.

84095012A 数据手册

数据手册 说明 数量 操作
84095012A

8-BIT PARALLEL-LOAD SHIFT REGISTERS

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84095012A 电路图

84095012A 电路图

84095012A 电路图

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