更新日期:2024-04-01
产品简介:具有复位功能的高速 CMOS 逻辑双路可重触发单稳多频振荡器
查看详情5962-8970001EA 供应商
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Texas Instruments
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CDIP16
21+ -
109
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上海市
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-
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一级代理原装
5962-8970001EA 中文资料属性参数
- 现有数量:0现货10,001Factory
- 价格:在售
- 系列:*
- 包装:管件
- 产品状态:在售
- 逻辑类型:-
- 独立电路:-
- 施密特触发器输入:-
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产品特性
- Overriding Reset Terminates Output Pulse
- Triggering From the Leading or Trailing Edge
- Q and Q\ Buffered Outputs
- Separate Resets
- Wide Range of Output-Pulse Widths
- Schmitt Trigger on Both A\ and B Inputs
- Fanout (Over Temperature Range) Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
- Wide Operating Temperature Range . . . 55°C to 125°C
- Balanced Propagation Delay and Transition Times
- Significant Power Reduction Compared to LSTTL Logic ICs
- HC Types 2V to 6V Operation High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
- HCT Types 4.5V to 5.5V Operation Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min) CMOS Input Compatibility, Il 1µA at VOL, VOH
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il 1µA at VOL, VOH
产品概述
The HC123, HCT123, CD74HC423 and CD74HCT423 are dual monostable multivibrators with resets. They are all retriggerable and differ only in that the 123 types can be triggered by a negative to positive reset pulse; whereas the 423 types do not have this feature. An external resistor (RX) and an external capacitor (CX) control the timing and the accuracy for the circuit. Adjustment of Rx and CX provides a wide range of output pulse widths from the Q and Q\ terminals. Pulse triggering on the A\ and B inputs occur at a particular voltage level and is not related to the rise and fall times of the trigger pulses.Once triggered, the output pulse width may be extended by retriggering inputs A\ and B. The output pulse can be terminated by a LOW level on the Reset (R) pin. Trailing edge triggering (A)\ and leading edge triggering (B) inputs are provided for triggering from either edge of the input pulse. If either Mono is not used each input on the unused device (A\, B, and R\) must be terminated high or low.The minimum value of external resistance, Rx is typically 5k. The minimum value external capacitance, CX, is 0pF. The calculation for the pulse width is tW = 0.45 RXCX at VCC = 5V.
5962-8970001EA 数据手册
数据手册 | 说明 | 数量 | 操作 |
---|---|---|---|
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High-Speed CMOS Logic Dual Retriggerable Monostable Multivibrators with Resets |
16 Pages页,364K | 查看 |
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