- 参考价格:¥192.44-¥204.86
更新日期:2024-04-01 00:04:00
DS92LV8028TUF 供应商
- 公司
- 型号
- 品牌
- 封装/批号
- 数量
- 地区
- 日期
- 说明
- 询价
-
NS
-
BGA196
23+ -
5800
-
上海市
-
-
-
进口原装现货,杜绝假货。
-
NSC/ELNAF
-
BGA
1827+ -
905
-
上海市
-
-
-
原装现货,精专配套,正品BOM表报价
-
TI
-
原厂原装
22+ -
3288
-
上海市
-
-
-
一级代理原装
DS92LV8028TUF 中文资料属性参数
- 制造商:National Semiconductor (TI)
- 激励器数量:1
- 接收机数量:10
- 数据速率:660 Mbps
- 工作电源电压:3.3 V
- 最大工作温度:+ 85 C
- 封装 / 箱体:LBGA
- 封装:Tray
- 最小工作温度:- 40 C
- 安装风格:SMD/SMT
- Supply Voltage - Max:3.6 V
- Supply Voltage - Min:3 V
- 类型:LVDS
产品特性
- All 8 Channels Synchronous to One Parallel Clock Rate, from 25 to 66 MHz
- Duplicates Function of Multiple DS92LV1021 and '1023 10-bit Serializer Devices
- Serializes from One to Eight 10-bit Parallel Inputs into Data Streams with Embedded Clock
- Eight 5 mA Modified Bus LVDS Outputs that are Capable to Drive Double Terminations
- @Speed Test - PRBS Generation to Check LVDS Transmission Path to SCAN921224 or SCAN921260
- On Chip Filtering for PLL
- 740mW Typ Power Dissipation (Loaded, PRBS, 66MHz, 3.3V)
- High Impedance Inputs and Outputs on Power Off
- Single Power Supply at +3.3V (+/-10%)
- 196-Pin NFBGA Package
- JTAG Pins Reserved for Next Version of Device
- Industrial Temperature Range Operation: -40 to +85 °C
产品概述
The DS92LV8028 integrates eight serializer devices into a single chip. The DS92LV8028 can
simultaneously serialize up to eight 10-bit data streams. The 10-bit parallel inputs are LVTTL
signal levels. The serialized outputs are LVDS signals with extra drive current for point-to-point
and lightly loaded multidrop applications. Each serializer block in the DS92LV8028 operates
independently by using strobes from a single shared PLL.The DS92LV8028 uses a single +3.3V power supply with a typical power dissipation of 740mW
(3.3V / PRBS / 66 MHz). Each serializer channel has a unique power down control to further conserve
power consumption. For high-speed LVDS serial data transmission, line quality is essential, thus the
DS92LV8028 includes an @SPEED TEST function. Each Serializer channel has the ability internally
generated a PRBS data pattern. This pattern is received by specific deserializers (SCAN921224)
which have the complement PRBS verification circuit. The deserializer checks the data pattern for
bit errors and reports any errors on the test verification pins on the deserializer. For additional information - please see the section in this datasheet.
DS92LV8028TUF 电路图
DS92LV8028TUF 电路图
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